Exemplary embodiments of the present invention relate to a method for fabricating a semiconductor device, and more particularly, to a method for fabricating a semiconductor device with a buried bitline connected to one side contact.
Traditional planar metal oxide semiconductor field effect transistors (MOSFETs) have reached physical limitations in further improving performance with respect to leakage current, on-current, short channel effect, and so on. Thus, miniaturization of such traditional planar MOSFETs is also reaching limits. Thus, semiconductor devices using vertical channels rather than planar channels are being developed as a replacement.
In the fabrication of a semiconductor device using a vertical channel, a surround type gate electrode (also referred to as a vertical gate) is formed to surround an active pillar extending vertically on a semiconductor substrate. A source region and a drain region are formed over and below the active pillar. In this way, the semiconductor device with the vertical channel may be fabricated.
FIG. 1 is a cross-sectional view of a conventional semiconductor device with a vertical channel.
Referring to FIG. 1, a plurality of pillar structures each including an active pillar 12 and a hard mask layer 13 are formed on a substrate 11. The active pillar 12 extends vertically on the substrate 11. A gate dielectric layer 14 and a vertical gate 15 are formed to surround the outer wall of the active pillar 12, and a buried bitline (BBL) 16 is formed by implanting impurity ions into the substrate 11. An interlayer dielectric layer 18 is buried in a trench 17 to isolate adjacent bitlines 16 from each other.
In order to form the buried bitline 16 buried below the vertical gate 15, an ion implantation process may be performed to implant dopant. As the semiconductor device is further miniaturized, however, the implantation of dopant is reaching limits in reducing the resistance of the bitline 16 and thus, is leading to degradation in characteristics of the semiconductor device.